zebra2-server
pcomp_either
  • Zebra2
  • Block functional documentation
    • BITS - Soft inputs and constant bits
    • CLOCKS - Configurable clocks
    • PULSE - One-shot pulse delay and stretch [x4]
    • DIV - Pulse divider [x4]
    • SRGATE - Set Reset Gate
    • LUT - 5 Input lookup table [x8]
    • SEQ - Sequencer
    • COUNTER [x8]
    • PCOMP - Position Compare [x4]
    • PCAP - Position Capture
    • PGEN - Position Generator [x2]
    • INENC - Input encoder
    • LVDSIN - LVDS Input
    • LVDSOUT - LVDS Output
    • OUTENC - Output encoder
    • POSENC - Quadrature and step/direction encoder
    • QDEC - Quadrature Decoder
    • TTLIN - TTL Input
    • FILTER - Filter
    • TTLOUT - TTL Output
  • Triggering schemes
  • Unit testing FPGA blocks
  • API doc for configparser
zebra2-server
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  • Block functional documentation
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Block functional documentationΒΆ

Each block is documented with examples

  • BITS - Soft inputs and constant bits
  • CLOCKS - Configurable clocks
  • PULSE - One-shot pulse delay and stretch [x4]
  • DIV - Pulse divider [x4]
  • SRGATE - Set Reset Gate
  • LUT - 5 Input lookup table [x8]
  • SEQ - Sequencer
  • COUNTER [x8]
  • PCOMP - Position Compare [x4]
  • PCAP - Position Capture
  • PGEN - Position Generator [x2]
  • INENC - Input encoder
  • LVDSIN - LVDS Input
  • LVDSOUT - LVDS Output
  • OUTENC - Output encoder
  • POSENC - Quadrature and step/direction encoder
  • QDEC - Quadrature Decoder
  • TTLIN - TTL Input
  • FILTER - Filter
  • TTLOUT - TTL Output
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© Copyright 2015, Michael Abbott, Tom Cobb Revision ace1aa46.

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